Verisity
Silicon Canvas
Workgroup in a Rack
Click here for EDAToolsCafe Click here for EDAToolsCafe Click here for Internet Business Systems Click here for Hewlett Packard Click here for EDAToolsCafe
Search:
  Home | EDAVision | Companies | Downloads | Interviews | Forums | News | Resources |  ItZnewz  | | PCBCafe
  Check Mail | Submit Material | Universities | Books & Courses | Events | Membership | Fun Stuff | Advertise |
 Browse eCatalog:  Subscribe to EDA Daily News
eCatalogAsic & ICPCBFPGADesign ServicesHardwareSIP
Email: 
 EDAToolsCafe 

Printer Friendly Version

LogicVision Certifies Verplex"s Formal Verification for Its Embedded Test Flow

Product Interoperability Shortens Time-to-Market

SAN JOSE, Calif.--(BUSINESS WIRE)--May 13, 2002--LogicVision, Inc. (Nasdaq:LGVN - News), a leading provider of embedded test IP for integrated circuits and systems, and Verplex Systems, Inc., provider of high speed, high-capacity and easy-to-use formal verification products for complex SoC designs today announced the successful completion of interoperability testing with Verplex's Conformal(TM) Logic Equivalence Checker (LEC) formal verification product. This capability will further drive adoption of Embedded Test Solution(TM), shortening development and manufacturing time of IC designs.

The Conformal LEC formal verification tool provides customers with an alternate approach to simulation for verifying the functionality of their designs incorporating LogicVision's embedded test. Formal verification, when combined with static timing analysis, eliminates days of simulation tasks that would otherwise be required to confirm the intended chip function has not been altered as a result of changes to a design. The productivity gain becomes increasingly important for SoCs and complex ASIC designs, where lengthy simulation times can severely impact product development schedules.

"LogicVision's commitment in delivering embedded test products and solutions that shorten time to market of new LogicVision testable designs remains unwavering. Our relationship with Verplex in providing an accelerated mechanism for verifying test-ready designs is further evidence of that continuing commitment," said Mukesh Mowji, LogicVision's vice president of marketing. "We highly recommend leveraging Verplex's Conformal LEC in the LogicVision Embedded Test flow to minimize development time. Verplex's independence from the design tool flow gives us confidence that any design tool bugs will be identified in the verification process."

"LogicVision's commitment to its customers, along with its excellent products, makes it an ideal partner for Verplex," said Dino Caporossi, Verplex's vice president of corporate marketing. "As our customers' designs go through the many critical value-added transformations, such as embedded test, they count on Verplex's verification solutions for the independent audit assurance."

LogicVision's certification announcement of Verplex's formal verification product confirms Conformal(TM) LEC's ability to validate the functional mode of a design that incorporates embedded test. This achievement represents the first phase of the planned cooperation between the two companies, with the second phase addressing formal verification of the LogicVision test modes, including logic and memory BIST.

About LogicVision Inc.

LogicVision (Nasdaq:LGVN - News) provides proprietary technologies for embedded test that enable the more efficient design and manufacture of complex semiconductors. LogicVision's embedded test solution allows integrated circuit designers to embed into a semiconductor design test functionality that can be used during semiconductor production and throughout the useful life of the chip. For more information on the company and its products, please visit the LogicVision website at www.logicvision.com.

About Verplex Systems

Verplex Systems Inc. is an electronic design automation (EDA) company focusing on delivery of the highest speed, highest-capacity and easiest-to-use formal verification products for complex system-on-chip (SoC) design. Founded in 1997, it is privately held and funded by leading venture capital firms. Corporate headquarters is located at 300 Montague Expressway, Suite 100, Milpitas, Calif. 95035. Telephone: 408/586-0300. Facsimile: 408/586-0230. Email: info@verplex.com. Online information is found at its Web Site: http://www.verplex.com.

Forward Looking Statements

Except for the historical information contained herein, the matters set forth in this press release, including statements as to LogicVision's expectation that the capability of its embedded test to interoperate with Verplex's Conformal LEC formal verification product will further drive adoption of its Embedded Test Solution(TM) by customers, LogicVision's commitment to deliver embedded test products and solutions that shorten time to market of new LogicVision testable designs and its efforts to provide an accelerated mechanism for verifying test-ready designs, are forward-looking statements within the meaning of the Private Securities Litigation Reform Act of 1995. These forward-looking statements are subject to risk and uncertainties that could cause actual results to differ materially, including, but not limited to, the impact of technological advances and competitive products and other risks detailed from time to time in LogicVision's SEC reports, including its annual report on Form 10-K for the year ended December 31, 2001. These forward-looking statements speak only as of the date hereof. LogicVision disclaims any obligation to update these forward-looking statements.

Note to Editors: LogicVision, Embedded Test, LogicVision Ready and LogicVision logos are trademarks or registered trademarks of LogicVision Inc. in the United States and other countries. All other trademarks and service marks are the property of their respective owners.

Acronyms and Definitions:

ATE:        Automatic Test Equipment

ATPG:       Automatic Test Pattern Generation

BIST:       Built-in-Self-Test

DFT:        Design-for-Test

EDA:        Electronic Design Automation

GDSII:      An industry format describing the physical structure of
            the chip design and used to create mask tooling for chip
            manufacturing.

GUI:        Graphics User Interface

HDL:        Hardware Description Language - Describes the architecture
            and behavior of discrete electronic systems.

IC:         Integrated Circuit

RTL:        Register Transfer-Level - A chip design language format -
            technology independent that can be Verilog or VHDL.

Verilog:    A hardware description language used to design and
            document electronic systems.

VHDL:       VHSIC (Very High-Speed Integrated Circuit) HDL

IP:         Intellectual Property

SoC:        System-on-chip


Contact:
     LogicVision Inc., San Jose
     Clarisse Balistreri, 408/453-0146
     clarisse@logicvision.com
            or
     The Loomis Group
     Vincent Mayeda, 909/614-1767
     vincent@loomisgroup.com
            or
     Verplex Systems Inc.
     Nanette V.Collins, 617/437-1822
     nanette@nvc.com

http://www.mentor.com/dsm/
http://www.mentor.com/fpga/
http://www.mentor.com/dft/
http://www.mentor.com/pcb/
http://www.mentor.com/embedded/


Click here for Internet Business Systems Copyright 2002, Internet Business Systems, Inc.
1-888-44-WEB-44 --- marketing@ibsystems.com